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TC7136/TC7136A
Low Power 3-1/2 Digit Analog-to-Digital Converter
Features
* Fast Over Range Recovery, Ensured First Reading Accuracy * Low Temperature Drift Internal Reference - TC7136: 70ppm/C (Typ.) - TC7136A: 35ppm/C (Typ.) * Zero Reading with Zero Input * Low Noise: 15VP-P * High Resolution: 0.05% * Low Input Leakage Current: 1pA (Typ.)/10pA (Max.) * Precision Null Detectors with True Polarity at Zero * High-Impedance Differential Input * Convenient 9V Battery Operation with Low Power Dissipation: 500W (Typ.)/900W (Max.)
General Description
The TC7136 and TC7136A are low power, 3-1/2 digit with liquid crystal display (LCD) drivers and analog-todigital converters. These devices incorporate an "integrator output zero" phase, which enables over range recovery. The performance of existing TC7126, TC7126A and ICL7126 based systems may be upgraded with minor changes to external, passive components. The TC7136A has an improved internal zener reference voltage circuit which maintains the analog common temperature drift to 35ppm/C (typical) and 75ppm/C (maximum). This represents an improvement of two to four times over similar 3-1/2 digit converters. The costly, space consuming external reference source may be removed. The TC7136 and TC7136A limit linearity error to less than 1 count on 200mV or 2V full scale ranges. The rollover error (the difference in readings for equal magnitude, but opposite polarity input signals) is below 1 count. High-impedance differential inputs offer 1pA leakage currents and a 1012 input impedance. The differential reference input allows ratiometric measurements for ohms or bridge transducer measurements. The 15VP-P noise performance ensures a "rock solid" reading. The auto-zero cycle enables a zero display readout for a 0V input.
Applications
* Thermometry * Bridge Readouts: Strain Gauges, Load Cells, Null Detectors * Digital Meters: Voltage/Current/Ohms/Power, pH * Digital Scales, Process Monitors * Portable Instrumentation
Device Selection Table
Part Number TC7136 CPI TC7136 CKW TC7136 CLW TC7136A CPI TC7136A CKW TC7136A CLW Package 40-Pin PDIP 44-Pin PQFP 44-Pin PLCC 40-Pin PDIP 44-Pin PQFP 44-Pin PLCC Temperature Range 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C
2002 Microchip Technology Inc.
DS21461B-page 1
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TC7136/TC7136A
Package Type
44-Pin PLCC
REF LO REF HI REF HI CREF+ OSC1 OSC2 OSC3 TEST CREF-
44-Pin PQFP
ANALOG COMMON IN HI IN LO BUFF
NC
INT
35
V+
C1
D1
A1
B1
AZ
6
5
4
3
2
1
44
43
42
41
40
44 43
42
41 40 39
38
37
36
V34
F1 G1 E1
7 8 9
39 REF LO 38 CREF+ 37 CREF-
NC 1 NC 2 TEST 3 OSC3 4 NC 5 OSC2 6 OSC1 7 V+
8
33 NC 32 G2 31 C3 30 A3
D2 10 C2 11 NC 12 B2 13 A2 14 F2 15
E2 16
ANALOG 36 COMMON
TC7136CLW TC7136ACLW
35 IN HI 34 NC 33 IN LO 32 AZ 31 BUFF 30 INT 29 V-
TC7136CKW TC7136ACKW
29 G3 28 BP 27 POL 26 AB4 25 E3 24 F3 23 B3
D1 9 C1 10 B1 11
12 13 14 15 16 17 18 19
D3 17
18 19 20 21 22 23 24 25
26
27
28
20
21 22
G3
A3
POL
AB4
BP
C3
NC
G2
B3
E3
F3
G1
C2
40-Pin PDIP
V+ D1 C1 B1 1's A1 F1 G1 E1 D2 1 2 3 4 5 6 7 8 9 Normal Pin Configuration 40 OSC1 39 OSC2 OSC1 OSC2 OSC3 TEST VREF+ VREFCREF+ CREF1 2 3 4 5 6 7 8
40-Pin PDIP
Reverse Pin Configuration 40 V+ 39 D1 38 C1 37 B1 36 A1 35 F1 1's
38 OSC3 37 TEST 36 VREF+ 35 VREF34 CREF+ 33 CREF32 ANALOG COMMON 31 VIN+ 30 VIN29 CAZ 28 VBUFF 27 VINT 26 V25 G2 24 C3 23 A3 22 G3 21 BP (Backplane) 100's 100's
D2
34 G1
TC7136CPL TC7136ACPL
C2 10 10's B2 11 A2 12
ANALOG 9 COMMON VIN+ 10 VIN- 11 CAZ VBUFF VINT VG2 C3 A3 12 13 14 15 16 17 18
TC7136RCPL TC7136ARCPL
33 E1 32 D2 31 C2 30 B2 29 A2 28 F2 10's
F2 13 E2 14
27 E2 26 D3 25 B3 24 F3 100's
D3 15 100's B3 16
F3 17 E3 18 19
23 E3 22 AB4 1000's
1000's
AB4
G3 19 BP 20 (Backplane)
POL 20 (MINUS SIGN)
21 POL (Minus Sign)
NC = No Internal Connection
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D3
A1
F1
E1
B2
A2
F2
E2
TC7136/TC7136A
Typical Application
0.1F 34 CREF+ 31 VIN+ 33 CREF9-19 Segment 22-25 Drive LCD
1M + Analog Input - 0.01F
30 V IN
TC7136 TC7136A POL 20
BP V+ 21 1
Minus Sign
32 ANALOG COMMON 28 180k 0.47 F 29 VBUFF
Backplane
240k VREF+ 36 10k 35 26
+
9V
CAZ VREFVOSC3 OSC1 38 COSC 40 ROSC 50pF 560k
0.15F
27 V INT OSC2 39
1 Conversion/Sec
To Analog Common (Pin 32)
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DS21461B-page 3
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Typical Segment Input V+ 0.5mA Segment Output LCD 2mA
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DS21461B-page 4
Internal Digital Ground
Functional Block Diagram
TC7136/A
RINT VREFCREF- VBUFF V 28 Integrator - + -
ZI AZ
BP 21 CAZ CINT VINT 1 To Digital Section 7-Segment Decode 29 27 7-Segment Decode 7-Segment Decode LCD Segment Drivers
TC7136/TC7136A
CREF
CREF+ 35 33
VREF+
34
36
/ 200
- +
ZI & AZ +
10 A
ZI & AZ
Data Latch
31 DE (+) - DE (-)
V+ - 2.8V
VIN+ Comparator
INT LOW TEMPCO VREF Clock
DE (-)
Thousands
Hundreds
Tens
Units
To Switch 1 FOSC /4 Control Logic
6.2V
ANALOG COMMON
32
DE (+)
+
V+
AZ & DE () 26 V40 OSC1 39 OSC2 ROSC 38 OSC3 COSC
VINInternal Digital Ground VTH = 1V 500
37
INT
TEST
2002 Microchip Technology Inc.
26
V-
TC7136/TC7136A
1.0 ELECTRICAL CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings*
Supply Voltage (V+ to V-)....................................... 15V Analog Input Voltage (Either Input) (Note 1)... V+ to VReference Input Voltage (Either Input)............ V+ to VClock Input .................................................TEST to V+ Package Power Dissipation (TA 70C) (Note 2): Plastic DIP ................................................... 1.23W Plastic Quad Flat Package .......................... 1.00W PLCC ........................................................... 1.23W Operating Temperature Range: C Devices.......................................... 0C to +70C I Devices ........................................ -25C to +85C Storage Temperature Range .............. -65C to +150C
TC7136 AND TC7136A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VS = 9V, fCLK = 16kHz, and TA = +25C, unless otherwise noted. Symbol Input Zero Input Reading Zero Reading Drift Ratiometric Reading NL ER eN IL CMRR TCSF Note 1: 2: 3: 4: Non-Linearity Error Rollover Error Noise Input Leakage Current Common Mode Rejection Ratio Scale Factor Temperature Coefficient -000.0 -- 999 -- -1 -- -- -- -- 000.0 0.2 999/1000 1 -1 15 1 50 1 +000.0 1 1000 0.2 0.2 -- 10 -- 5 Digital VIN = 0V, Full Scale = 200mV Reading V/C VIN = 0V, 0C TA +70C Digital VIN = VREF, VREF = 100mV Reading Count 1 Count VP-P pA V/V ppm/C Full Scale = 20mV or 2V Max. Deviation from best Straight Line VIN - = VIN + 200mV VIN = 0V, Full Scale = 200mV VIN = 0V VCM = 1V, VIN = 0V, Full Scale = 200mV VIN = 199mV, 0C TA +70C Ext. Ref. Temp. Coeff. = 0ppm/C Parameter Min Typ Max Unit Test Conditions
Input voltages may exceed supply voltages when input current is limited to 100A. Dissipation rating assumes device is mounted with all leads soldered to PC board. Refer to "Differential Input" discussion. Backplane drive is in phase with segment drive for "OFF" segment and 180 out-of-phase for "ON" segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: See "Typical Application". 6: A 48kHz oscillator increases current by 20A (typical). Common current not included.
2002 Microchip Technology Inc.
DS21461B-page 5
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TC7136/TC7136A
TC7136 AND TC7136A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VS = 9V, fCLK = 16kHz, and TA = +25C, unless otherwise noted. Symbol Analog Common VCTC Analog Common Temperature Coefficient TC7136A TC7136 TC7136A TC7136 VC Analog Common Voltage -- -- -- -- 2.7 35 70 35 70 3.05 75 150 100 150 3.35 ppm/C ppm/C ppm/C ppm/C V 250k between Common and V+ 0C TA +70C "C" Commercial Temp. Range Devices -25C TA +85C "I" Industrial Temp. Range Devices 250k Between Common and V+ Parameter Min Typ Max Unit Test Conditions
LCD Drive VSD VBD LCD Segment Drive Voltage LCD Backplane Drive Voltage 4 4 5 5 6 6 VP-P VP-P A V+ to V- = 9V V+ to V- = 9V
Power Supply IS Note 1: 2: 3: 4: Power Supply Current -- 70 100 VIN = 0V, V+ to V- = 9V (Note 6)
Input voltages may exceed supply voltages when input current is limited to 100A. Dissipation rating assumes device is mounted with all leads soldered to PC board. Refer to "Differential Input" discussion. Backplane drive is in phase with segment drive for "OFF" segment and 180 out-of-phase for "ON" segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: See "Typical Application". 6: A 48kHz oscillator increases current by 20A (typical). Common current not included.
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TC7136/TC7136A
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin Number (40-Pin PDIP) Normal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
PIN DESCRIPTION
(Reverse) (40) (39) (38) (37) (36) (35) (34) (33) (32) (31) (30) (29) (28) (27) (26) (25) (24) (23) (22) (21) (20) (19) (18) (17) (16) (15) (14) Symbol V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 AB4 POL BP G3 A3 C3 G2 VVINT Description Positive supply voltage. Activates the D section of the units display. Activates the C section of the units display. Activates the B section of the units display. Activates the A section of the units display. Activates the F section of the units display. Activates the G section of the units display. Activates the E section of the units display. Activates the D section of the tens display. Activates the C section of the tens display. Activates the B section of the tens display. Activates the A section of the tens display. Activates the F section of the tens display. Activates the E section of the tens display. Activates the D section of the hundreds display. Activates the B section of the hundreds display. Activates the F section of the hundreds display. Activates the E section of the hundreds display. Activates both halves of the 1 in the thousands display. Activates the negative polarity display. Backplane drive output. Activates the G section of the hundreds display. Activates the A section of the hundreds display. Activates the C section of the hundreds display. Activates the G section of the tens display. Negative power supply voltage. The integrating capacitor should be selected to give the maximum voltage swing that ensures component tolerance buildup will not allow the integrator output to saturate. When analog common is used as a reference and the conversion rate is 3 readings per second, a 0.047F capacitor may be used. The capacitor must have a low dielectric constant to prevent rollover errors. See Section 6.3, Integrating Capacitor for additional details. Integration resistor connection. Use a 180k for a 20mV full scale range and a 1.8M for 2V full scale range. The size of the auto-zero capacitor influences the system noise. Use a 0.47F capacitor for a 200mV full scale and a 0.1F capacitor for a 2V full scale. See Section 6.1, Auto-Zero Capacitor for more details. The low input signal is connected to this pin. The high input signal is connected to this pin. This pin is primarily used to set the Analog Common mode voltage for battery operation, or in systems where the input signal is referenced to the power supply. See Section 7.3, Analog Common for more details. It also acts as a reference voltage source. See Pin 34.
28 29
(13) (12)
VBUFF CAZ
30 31 32
(11) (10) (9)
VIN VIN + ANALOG COMMON
33
(8)
CREF-
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DS21461B-page 7
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TC7136/TC7136A
TABLE 2-1:
Pin Number (40-Pin PDIP) Normal 34
PIN DESCRIPTION (CONTINUED)
(Reverse) (7) Symbol CREF+ Description A 0.1F capacitor is used in most applications. If a large Common mode voltage exists (for example, the VIN- pin is not at analog common) and a 200mV scale is used, a 1F capacitor is recommended, which will hold the rollover error to 0.5 count. See Pin 36. The analog input required to generate a full scale output (1999 counts). Place 100mV between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for 2V full scale. See Section 6.6, Reference Voltage. Lamp test. When pulled HIGH (to V+), all segments will be turned ON and the display should read -1888. It may also be used as a negative supply for externally generated decimal points. See Section 7.4, Test for additional information. See Pin 40. See Pin 40. Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings per second), connect Pin 40 to the junction of a 180k resistor and a 50pF capacitor. The 180k resistor is tied to Pin 39 and the 50pF capacitor is tied to Pin 38.
35
(6) (5)
VREFVREF+
36
(4)
TEST
37 38 39
(3) (2) (1)
OSC3 OSC2 OSC1
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DS21461B-page 8
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TC7136/TC7136A
3.0
3.1
DETAILED DESCRIPTION
Dual Slope Conversion Principles
FIGURE 3-1:
(All Pin Designations Refer to 40-Pin PDIP.)
BASIC DUAL SLOPE CONVERTER
CINT
The conventional dual slope converter measurement cycle has two distinct phases (see Figure 3-1). 1. 2. Input signal integration Reference voltage integration (de-integration)
Switch Driver REF Voltage Polarity Control Phase Control Control Logic
The input signal being converted is integrated for a fixed time period (tSI), measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (tRI). In a simple dual slope converter, a complete conversion requires the integrator output to "ramp up" and "ramp down." A simple mathematical equation relates the input signal, reference voltage, and integration time:
Display
Integrator Output
VIN VREF VIN 1/2 VREF Fixed Signal Integrate Time Variable Reference Integrate Time
FIGURE 3-2:
NORMAL MODE REJECTION OF DUAL SLOPE CONVERTER
EQUATION 3-1:
Normal Mode Rejection (dB)
30
1 -------V IN ( t ) dt RC 0
t SI
= -----------RC
V R t RI
Where: VR = Reference voltage tSI = Signal integration time (fixed) tRI = Reference voltage integration time (variable) For a constant VIN:
20
10
t = Measured Period 0 0.1/t 1/t Input Frequency 10/t
EQUATION 3-2:
V IN
=
t RI V ------Rt SI
The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values, as long as they are stable during a measurement cycle. Noise immunity is an inherent benefit. Noise spikes are integrated or averaged to zero during integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated. Integrating ADCs commonly operate with the signal integration period set to a multiple of the 50Hz/60Hz power line period.
2002 Microchip Technology Inc.
+
- Clock Counter
+
-
The TC7136/A is a dual slope, integrating analog-todigital converter. An understanding of the dual slope conversion technique will aid in following detailed TC7136/A operational theory.
Analog Input Signal
Integrator Comparator
DS21461B-page 9
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TC7136/TC7136A
4.0 ANALOG SECTION
In addition to the basic integrate and de-integrate dual slope cycles discussed above, the TC7136 and TC7136A designs incorporate an "integrator output zero cycle" and an "auto-zero cycle." These additional cycles ensure the integrator starts at 0V (even after a severe over range conversion) and that all offset voltage errors (buffer amplifier, integrator and comparator) are removed from the conversion. A true digital zero reading is assured without any external adjustments. A complete conversion consists of four distinct phases: 1. 2. 3. 4. Integrator output zero phase Auto-zero phase Signal integrate phase Reference de-integrate phase The differential input voltage must be within the device Common mode range when the converter and measured system share the same power supply common (ground). If the converter and measured system do not share the same power supply common, VIN- should be tied to analog common. Polarity is determined at the end of signal integrate phase. The sign bit is a true polarity indication, in that signals less than 1LSB are correctly determined. This allows precision null detection, limited only by device noise and auto-zero residual offsets.
4.4
Reference Integrate Phase
4.1
Integrator Output Zero Phase
This phase ensures the integrator output is at 0V before the system zero phase is entered. This ensures that true system offset voltages will be compensated for, even after an over range conversion. The count for this phase is a function of the number of counts required by the de-integrate phase. The count lasts from 11 to 140 counts for non over range conversions and from 31 to 640 counts for over range conversions.
The third phase is reference integrate or de-integrate. VIN- is internally connected to analog common and VIN+ is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal and is between 0 and 2000 internal clock periods. The digital reading displayed is:
EQUATION 4-2:
V IN 1000 = ---------------V REF
4.2
Auto-Zero Phase
FIGURE 4-1:
During the auto-zero phase, the differential input signal is disconnected from the circuit by opening internal analog gates. The internal nodes are shorted to analog common (ground) to establish a zero input condition. Additional analog gates close a feedback loop around the integrator and comparator. This loop permits comparator offset voltage error compensation. The voltage level established on CAZ compensates for device offset voltages. The auto-zero phase residual is typically 10V to 15V. The auto-zero duration is from 910 to 2900 counts for non over range conversions and from 300 to 910 counts for over range conversions.
CONVERSION TIMING DURING NORMAL OPERATION
INT DENT ZI AZ
1000 1-2000 11-140 910-2900 4000
4.3
Signal Integration Phase
FIGURE 4-2:
The auto-zero loop is entered and the internal differential inputs connect to VIN+ and VIN-. The differential input signal is integrated for a fixed time period. The TC7136/A signal integration period is 1000 clock periods or counts. The externally set clock frequency is divided by four before clocking the internal counters. The integration time period is:
CONVERSION TIMING DURING OVER RANGE OPERATION
INT
1000
DEINT
2001-2090 31-640
EQUATION 4-1:
tSI = 4 x 1000 FOSC
ZI AZ 300-910 4000
Where FOSC = external clock frequency.
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TC7136/TC7136A
5.0 DIGITAL SECTION
Each phase of the measurement cycle has the following length: 1. 2. Auto-zero phase: 3000 to 2900 counts (1200 to 11,600 clock pulses) Signal integrate: 1000 counts (4000 clock pulses) The TC7136/A contains all the segment drivers necessary to directly drive a 3-1/2 digit LCD. An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 800. For three conversions per second, the backplane frequency is 60Hz with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal, the segment is OFF. An out-of-phase segment drive signal causes the segment to be ON, or visible. This AC drive configuration results in negligible DC voltage across each LCD segment, ensuring long LCD life. The polarity segment driver is ON for negative analog inputs. If VIN+ and VIN- are reversed, this indicator would reverse. On the TC7136/A, when the TEST pin is pulled to V+, all segments are turned ON. The display reads -1888. During this mode, the LCD segments have a constant DC voltage impressed. Note: Do not leave the display in this mode for more than several minutes. LCDs may be destroyed if operated with DC levels for extended periods.
This time period is fixed. The integration period is:
EQUATION 5-1:
Where:

tSI = 4000
1 FOSC
FOSC is the externally set clock frequency. 3. 4. Reference integrate: 0 to 2000 counts Zero integrator: 11 to 640 counts
The TC7136 is a drop-in replacement for the TC7126 and ICL7126. The TC7136A offers a greatly improved internal reference temperature coefficient. Minor component value changes are required to upgrade existing designs and improve the noise performance.
6.0
6.1
The display font and segment drive assignment are shown in Figure 5-1.
COMPONENT VALUE SELECTION
Auto-Zero Capacitor (CAZ)
FIGURE 5-1:
DISPLAY FONT AND SEGMENT ASSIGNMENT
Display Font
The CAZ capacitor size has some influence on system noise. A 0.47F capacitor is recommended for 200mV full scale applications, where 1LSB is 100V. A 0.1F capacitor is adequate for 2V full scale applications. A Mylar type dielectric capacitor is adequate.
1000's
100's
10's
1's
6.2
Reference Voltage Capacitor (CREF)
5.1
System Timing
The oscillator frequency is divided by 4 prior to clocking the internal decade counters. The four-phase measurement cycle takes a total of 4000 counts, or 16,000 clock pulses. The 4000 count cycle is independent of input signal magnitude.
The reference voltage, used to ramp the integrator output voltage back to zero during the reference integrate phase, is stored on CREF. A 0.1F capacitor is acceptable when VREF- is tied to analog common. If a large Common mode voltage exists (VREF- analog common) and the application requires a 200mV full scale, increase CREF to 1F. Rollover error will be held to less than 0.5 count. A Mylar type dielectric capacitor is adequate.
6.3
Integrating Capacitor (CINT)
CINT should be selected to maximize integrator output voltage swing without causing output saturation. Analog common will normally supply the differential voltage reference in this case, a 2V full scale integrator output swing is satisfactory. For 3 readings per second (FOSC = 48kHz), a 0.047F value is suggested. For one reading per second, 0.15F is recommended. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal 2V integrator swing.
2002 Microchip Technology Inc.
DS21461B-page 11
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TC7136/TC7136A
An exact expression for CINT is:
6.5
VFS RINT
Oscillator Components
EQUATION 6-1:

(4000) CINT = Where:
1 FOSC VINT
C OSC should be 50pF. R OSC is selected from the equation:
EQUATION 6-2:
FOSC = 0.45 RC
FOSC = Clock frequency at Pin 38 VFS = Full scale input voltage RINT = Integrating resistor VINT = Desired full scale integrator output swing CINT must have low dielectric absorption to minimize rollover error. A polypropylene capacitor is recommended.
Note that FOSC is / 4 to generate the TC7136A's internal clock. The backplane drive signal is derived by dividing FOSC by 800. To achieve maximum rejection of 60Hz noise pickup, the signal integrate period should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5 readings per second) will reject both 50Hz and 60Hz.
6.4
Integrating Resistor (RINT)
The input buffer amplifier and integrator are designed with Class A output stages. The output stage idling current is 6A. The integrator and buffer can supply 1A drive currents with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region, but not so large that PC board leakage currents induce errors. For a 200mV full scale, R INT is 180k. A 2V full scale requires 1.8M (see Table 6-1).
6.6
Reference Voltage Selection
A full scale reading (2000 counts) requires the input signal be twice the reference voltage. Required Full Scale Voltage* 200mV 2V
Note: *VREF = 2VREF.
VREF 100mV 1V
TABLE 6-1:
Component Value CAZ RINT CINT
Note:
Nominal Full Scale Voltage 200mV 0.47F 180k 0.047F 2V 0.1F 1.8M 0.047F
FOSC = 48kHz (3 reading per sec). ROSC = 180k, COSC = 50pF.
In some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. Assume, for example, a pressure transducer output for 2000 lb/in2 is 400mV. Rather than dividing the input voltage by two, the reference voltage should be set to 200mV. This permits the transducer input to be used directly. The differential reference can also be used when a digital zero reading is required, when VIN is not equal to zero. This is common in temperature measuring instrumentation. A compensating offset voltage can be applied between analog common and VIN-. The transducer output is connected between VIN+ and analog common.
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DS21461B-page 12
2002 Microchip Technology Inc.
TC7136/TC7136A
7.0
7.1
DEVICE PIN FUNCTIONAL DESCRIPTION
Differential Signal Inputs VIN+ (Pin 31), VIN- (Pin 30)
The TC7136/A is designed with true differential inputs and accepts input signals within the input stage Common mode voltage range (VCM). The typical range is
V+ - 1V to V- + 1V. Common mode voltages are removed from the system when the TC7136A operates from a battery or floating power source (isolated from measured system), Common mode voltage removed in battery operation with VIN = analog common and VINis connected to analog common (VCOM) (see Figure 7-1).
FIGURE 7-1:
COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH VIN = ANALOG COMMON
Segment Drive LCD
Measured System V+ VV+ VGND
VBUF V+ V-
CAZ
VINT
POL BP OSC1 OSC3 OSC2 V-
TC7136 TC7136A
ANALOG COMMON VREF- VREF+ V+
GND Power Source
+ 9V
In systems where Common mode voltages exist, the 86dB Common mode rejection ratio minimizes error. Common mode voltages do, however, affect the integrator output level. A worst case condition exists if a large positive VCM exists in conjunction with a full scale negative differential signal. The negative signal drives the integrator output positive along with VCM (see Figure 7-2.) For such applications, the integrator output swing can be reduced below the recommended 2V full scale swing. The integrator output will swing within 0.3V of V+ or V- without increased linearity error.
7.2
Differential Reference VREF+ (Pin 36), VREF- (Pin 35)
The reference voltage can be generated anywhere within the V+ to V- power supply range. To prevent rollover type errors being induced by large Common mode voltages, CREF should be large compared to stray node capacitance. The TC7136/A offers a significantly improved analog common temperature coefficient. This potential provides a very stable voltage, suitable for use as a voltage reference. The temperature coefficient of analog common is typically 35ppm/C.
FIGURE 7-2:
COMMON MODE VOLTAGE REDUCES AVAILABLE INTEGRATOR SWING (VCOM VIN)
CI RI - + Integrator VI
7.3
Analog Common (Pin 32)
Input Buffer + VIN - VCM + -
tI VCM = VIN VI = CI Where: 4000 tI = Integration time = FOSC CI = Integration capacitor
[
[
The analog common pin is set at a voltage potential approximately 3V below V+. The potential is between 2.7V and 3.35V below V+. Analog common is tied internally to an N-channel FET, capable of sinking 100A. This FET will hold the common line at 3V below V+ if an external load attempts to pull the common line toward V+. Analog common source current is limited to 1A. Analog common is, therefore, easily pulled to a more negative voltage (i.e., below V+ - 3V).
RI = Integration resistor
2002 Microchip Technology Inc.
DS21461B-page 13
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TC7136/TC7136A
The TC7136/A connects the internal VIN+ and VINinputs to analog common during the auto-zero phase. During the reference integrate phase, VIN- is connected to analog common. If VIN- is not externally connected to analog common, a Common mode voltage exists, but is rejected by the converter's 86dB Common mode rejection ratio. In battery operation, analog common and VIN- are usually connected, removing Common mode voltage concerns. In systems where VIN- is connected to the power supply ground or to a given voltage, analog common should be connected to VIN-. The analog common pin serves to set the analog section reference, or common point. The TC7136A is specifically designed to operate from a battery, or in any measurement system where input signals are not referenced (float), with respect to the TC7136A power source. The analog common potential of V+ - 3V gives a 7V end of battery life voltage. The common potential has a 0.001%/% voltage coefficient. With sufficiently high total supply voltage (V+ - V- > 7V), analog common is a very stable potential with excellent temperature stability (typically 35ppm/C for TC7136A. This potential can be used to generate the TC7136A's reference voltage. An external voltage reference will be unnecessary in most cases, because of the 35ppm/C temperature coefficient. See Section 7.5, TC7136A Internal Voltage Reference discussion.
FIGURE 7-3:
ANALOG COMMON TEMPERATURE COEFFICIENT
200 180 Analog Common Temperature Coefficient (ppm/C) 160 140 120 100 80 60 40 20 TC7136A 0 TC7136 ICL7136 Typical Maximum Typical Maximum No Maximum Specified Typical
FIGURE 7-4:
TC7136A INTERNAL VOLTAGE REFERENCE CONNECTION
9V +
7.4
TEST (Pin 37)
26 V-
1 V+
240k
The TEST pin potential is 5V less than V+. TEST may be used as the negative power supply connection for external CMOS logic. The TEST pin is tied to the internally generated negative logic supply through a 500 resistor. The TEST pin load should not be more than 1mA. See Section 8.0, Typical Applications for additional information on using TEST as a negative digital logic supply. If TEST is pulled high (to V+), all segments plus the minus sign will be activated. DO NOT OPERATE IN THIS MODE FOR MORE THAN SEVERAL MINUTES. With TEST = V+, the LCD segments are impressed with a DC voltage which will destroy the LCD.
TC7136 TC7136A
VREF+ 36 10k VREF VREF- 35 ANALOG 32 COMMON Set VREF = 1/2 VREF
7.5
TC7136A Internal Voltage Reference
The TC7136 analog common voltage temperature stability has been significantly improved (Figure 7-3). The "A" version of the industry standard TC7136 device allows users to upgrade old systems and design new systems without external voltage references. External R and C values do not need to be changed; however, noise performance will be improved by increasing CAZ (see Section 6.1, Auto-Zero Capacitor). Figure 7-4 shows analog common supplying the necessary voltage reference for the TC7136/A.
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DS21461B-page 14
2002 Microchip Technology Inc.
TC7136/TC7136A
8.0
8.1
TYPICAL APPLICATIONS
Liquid Crystal Display Sources
Several manufacturers supply standard LCDs to interface with the TC7136A 3-1/2 digit analog-to-digital converter.
Manufac. Crystaloid Electronics AND Address/Phone 5282 Hudson Dr. Hudson, OH 44236 216-655-2429 720 Palomar Ave. Sunnyvale, CA 94086 408-523-8200 1800 Vernon St. Ste.2, Roseville, CA 95678 916-783-7878 612 E. Lake St. Lake Mills, WI 53551 414-648-236100 Representative Part Numbers* C5335, H5535, T5135, SX440 FE 0201, 0501 FE 0203, 0701 FE 2201 I1048, I1126
The unknown resistance is put in series with a known standard and a current passed through the pair. The voltage developed across the unknown is applied to the input and the voltage across the known resistor applied to the reference input. If the unknown equals the standard, the display will read 1000. The displayed reading can be determined from the following expression:
EQUATION 8-1:
Displayed(Reading) = RUNKNOWN x 1000 RSTANDARD
The display will over range for: RUNKNOWN 2 x R STANDARD
VGI, Inc.
FIGURE 8-1:
DECIMAL POINT AND ANNUNCIATOR DRIVES
Hamlin, Inc.
3902, 3933, 3903
Simple Inverter for Fixed Decimal Point or Display Annunciator
V+ V+
Note:
Contact LCD manufacturer for full product listing/ specifications.
TC7136 TC7136A
BP 21
4049
8.2
Decimal Point and Annunciator Drive
To LCD Decimal Point GND
TEST
37
The TEST pin is connected to the internally generated digital logic supply ground through a 500 resistor. The TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD annunciators for decimal points, low battery indication, or function indication may be added without adding an additional supply. No more than 1mA should be supplied by the TEST pin; its potential is approximately 5V below V+.
To LCD Backplane
Multiple Decimal Point or Annunciator Driver
V+ V+ BP
8.3
Ratiometric Resistance Measurements
TC7136 TC7136A
Decimal Point Select
To LCD Decimal Point
The TC7136A's true differential input and differential reference make ratiometric readings possible. In ratiometric operation, an unknown resistance is measured with respect to a known standard resistance. No accurately defined reference voltage is needed.
TEST
4030
GND
2002 Microchip Technology Inc.
DS21461B-page 15
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TC7136/TC7136A
FIGURE 8-2: LOW PARTS COUNT RATIOMETRIC RESISTANCE MEASUREMENT
VREF+ V+ RSTANDARD VREFVIN+ RUNKNOWN LCD
FIGURE 8-4:
POSITIVE TEMPERATURE COEFFICIENT RESISTOR TEMPERATURE SENSOR
+ 9V
5.6k 1N4148 R1 20k
160k V+ VINVIN+ V-
TC7136 TC7136A
VINANALOG COMMON
0.7%/C PTC
R3
R2 20k
TC7136 TC7136A
VREF+ VREFCOMMON
FIGURE 8-3:
TEMPERATURE SENSOR
+ 9V
160k
300k
300k V+ VINV-
1N4148 Sensor R2 50k
R1 50k
VIN+
TC7136 TC7136A
VREF+ VREFCOMMON
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DS21461B-page 16
2002 Microchip Technology Inc.
TC7136/TC7136A
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
Package marking data not available at this time.
9.2
Taping Form
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
PIN 1
W
P Standard Reel Component Orientation for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
44-Pin PQFP
24 mm
16 mm
500
13 in
Note: Drawing does not represent total number of pins.
Component Taping Orientation for 44-Pin PLCC Devices
User Direction of Feed
PIN 1
W
P Standard Reel Component Orientation for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
44-Pin PLCC
32 mm
24 mm
500
13 in
Note: Drawing does not represent total number of pins.
2002 Microchip Technology Inc.
DS21461B-page 17
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TC7136/TC7136A
9.3 Package Dimensions
40-Pin PDIP (Wide)
PIN 1
.555 (14.10) .530 (13.46)
2.065 (52.45) 2.027 (51.49)
.610 (15.49) .590 (14.99)
.200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .700 (17.78) .610 (15.50) .022 (0.56) .015 (0.38) 3 MIN.
.110 (2.79) .090 (2.29)
.070 (1.78) .045 (1.14)
Dimensions: inches (mm)
44-Pin PLCC
PIN 1
.050 (1.27) TYP. .695 (17.65) .685 (17.40) .656 (16.66) .650 (16.51)
.021 (0.53) .013 (0.33) .630 (16.00) .591 (15.00) .032 (0.81) .026 (0.66)
.656 (16.66) .650 (16.51) .695 (17.65) .685 (17.40) .180 (4.57) .165 (4.19)
.020 (0.51) MIN. .120 (3.05) .090 (2.29)
Dimensions: inches (mm)
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DS21461B-page 18
2002 Microchip Technology Inc.
TC7136/TC7136A
9.3 Package Dimensions (Continued)
44-Pin PQFP
.009 (0.23) .005 (0.13)
7 MAX.
PIN 1 .018 (0.45) .012 (0.30)
.041 (1.03) .026 (0.65)
.398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65)
.031 (0.80) TYP.
.398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65)
.010 (0.25) TYP. .083 (2.10) .075 (1.90) .096 (2.45) MAX.
Dimensions: inches (mm)
2002 Microchip Technology Inc.
DS21461B-page 19
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TC7136/TC7136A
SALES AND SUPPORT
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
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DS21461B-page 20
2002 Microchip Technology Inc.
TC7136/TC7136A
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro (R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21461B-page 21
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WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
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ASIA/PACIFIC
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Atlanta
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03/01/02
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DS21461B-page 22
2002 Microchip Technology Inc.
*B16412SD*

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